Asalka Cusub ee XC18V04VQG44C Spot Stock FPGA Field Programmable Gate Array Logic IC Chip Integrated Circuits

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Xilinx Xusuusta - Balanqaadyada Iskudubarid ee FPGAs

Xilinx wuxuu soo bandhigayaa taxanaha XC18V00 ee nidaamka ku jira qaabeynta qaabeynta barnaamijka PROMs (Jaantuska 1).Aaladaha qoyskan 3.3V waxa ka mid ah 4-megabit, 2-megabit, 1-megabit, iyo 512-kilobit PROM oo bixiya hab fudud oo la isticmaalo, hab kharash-ku-ool ah oo dib-u-habayn loogu samaynayo laguna kaydinayo qaabeynta Xilinx FPGA bitstreams.

Marka FPGA ay ku jirto qaabka Serial Master, waxay soo saartaa saacad qaabeynta oo wadda PROM-ka.Wakhti yar oo gelitaanka ka dib CE iyo OE la kartiyeeyay, xogta ayaa laga heli karaa PROM DATA (D0) pin ee ku xidhan pin FPGA DIN.Xog cusub ayaa la heli karaa waqti yar oo gelitaanka ka dib saacad kasta oo kor u kacda.FPGA waxay soo saartaa tirada saxda ah ee garaaca saacadaha si loo dhamaystiro qaabaynta.Marka FPGA ay ku jirto qaabka Serial Slave, PROM-ka iyo FPGA waxaa lagu xirayaa saacad dibadda ah.

Marka FPGA ay ku jirto qaabka loo yaqaan 'Master Select MAP', FPGA waxay soo saartaa saacad qaabeyn oo wadda PROM-ka.Marka FPGA ay ku jirto Slave Parallel ama Slave Select MAP, oscillator dibadeed ayaa soo saara saacada qaabeynta ee wadda PROM iyo FPGA.Kadib CE iyo OE la kartiyeeyo, xogta ayaa laga heli karaa biinanka PROM's DATA (D0-D7).Xog cusub ayaa la heli karaa waqti yar oo gelitaanka ka dib saacad kasta oo kor u kacda.Xogta waxa lagu xidhay FPGA dhinaca soo socota ee CCLK.Oscillator-ka bilaashka ah ayaa loo isticmaali karaa Isbarbardhigga Slave ama Xulashada Hababka MAP.

Aalado badan ayaa lagu shubi karaa iyadoo la isticmaalayo wax soo saarka CEO si loo kaxeeyo galinta CE ee qalabkan soo socda.Wax-soo-saarka saacada iyo wax-soo-saarka DATA ee dhammaan PROM-yada silsiladdan waa kuwo isku xidhan.Qalabyada oo dhan waa ay ku haboon yihiin waxaana lagu dhejin karaa xubnaha kale ee qoyska ama XC17V00 ee qoyska PROM ee taxanaha ah ee hal mar la qorsheeyay.